SDLC Toolkit with clock recovery for LabVIEW by RAFA Solutions easily implements and integrates Synchronous Data Link Control (SDLC) data communication protocol (developed by IBM) in custom applications. SDLC is equivalent to layer 2 of the Open Systems Interconnection (OSI) model of network communication.
The toolkit provides a LabVIEW FPGA Driver Library containing two FPGA VIs, the SDLC TX (transmitter) and the SDLC RX (receiver), for data transmission and reception. Single or multichannel data communication can be implemented with additional drivers, as well as both VIs implement bit stuffing, unstuffing, CRC calculation, and forward error correction to eliminate the need for additional data processing.
The toolkit VIs do not require external clock line for data sampling. SDLC RX VI recoveres the clock from the data signal with given baud rate.
The toolkit supports standard encoding (non-NRZI), as well as NRZ and NRZI line encoding methods.
Note, VI Package Manager 2016 is required to install the package.
- Minor improvements in the functionality
Release dateMarch 28, 2017